


RISC-V (pronounced "risk-five") is a license-free, modular, extensible instruction set architecture (ISA).
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RISC-V @lemmy.ml Jure Repinc @lemmy.ml Orange Pi RV2 Benchmarks: The Most Performant RISC-V Board For Less Than $100 With 8 Cores + 8GB RAM
Earlier this month Canonical announced Ubuntu Linux support for the Orange Pi RV2 as a low-cost RISC-V developer board. The Orange Pi RV2 with eight RISC-V cores and 8GB of RAM costs just around $64 USD. The price point and specs were interesting that I ordered one and have been running performance benchmarks on it since for seeing how capable this is as finally an interesting, low-cost and readily available RISC-V board.
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RISC-V @lemmy.ml Jure Repinc @lemmy.ml RISC-V Vector (RVV) C Intrinsic Specification Document v1.0 ratified
github.com Release v1.0 - Ratified · riscv-non-isa/rvv-intrinsic-docVersion of the RISC-V Vector Intrinsic document ratified by the RISC-V BoD.
The RISC-V vector C intrinsics provide users interfaces in the C language level to directly leverage the RISC-V "V" extension (RISC-V "V" Vector Extension, n.d.) (also abbreviated as "RVV"), with assistance from the compiler in handling instruction scheduling and register allocation. The intrinsics also aim to free users from responsibility of maintaining the correct configuration settings for the vector instruction executions. This document uses the term "RVV" as an abbreviation for the RISC-V "V" extension. This document uses the term "the RVV specification" to indicate the RISC-V "V" extension specification.
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RISC-V @lemmy.ml ☆ Yσɠƚԋσʂ ☆ @lemmy.ml Full Steam Ahead with RISC-V and Fedora Linux 42
fedoramagazine.org Full Steam Ahead with RISC-V and Fedora Linux 42 - Fedora MagazineThe Fedora RISC-V SIG is excited to share that our RISC-V images for Fedora Linux 42 have landed on-time and without delay!
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RISC-V @lemmy.ml Joe Bidet @lemmy.ml Banana Pi BPI f3 - Spacemit K1 anyone?
Has anyone used such a system as a "daily driver"?
What do you need to do in order to boot a normal distro such as Debian or such? How does it stand from the perspective of user/software freedom? What sorts of proprietary sh#ts does it need to be usable? What sorts of compromises that may not be obvious at first glance?
Also how does it "feel" day to day?
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RISC-V @lemmy.ml TheMightyCat @lemm.ee Does anyone know what's going on with the SG2044?
The SG2044 is the successor of the SG2042, with the same 64 core count but 8 LPDDR5X channels, 80 PCIe gen 5 lanes, and improved clock speed.
From what I can find in articles and reddit it supposed to have a launch date of 2024, but its not available on the sophon website or any other.
I am starting to worry it has been silently canceled, so does anyone know what happend to it? And if it's still coming what the projected release date is now?
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RISC-V @lemmy.ml Jure Repinc @lemmy.ml RISC-V With Linux 6.15 Adds Support For BFloat16 "BF16" Instructions
Merged on Friday for the nearly-over Linux 6.15 merge window were the RISC-V CPU architecture updates for this next kernel release.
RISC-V with Linux 6.15 brings build improvements thanks to a re-architecting of the Kconfig build system options around RISC-V for selecting sub-architecture features.
For the Linux 6.15 kernel with RISC-V there is also support for building relocatable non-MMU kernels, support for huge PFNMAPS to improve TLB utilization, support for runtime constants, new RISC-V instructions supported, and a variety of fixes.
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RISC-V @lemmy.ml schizoidman @lemm.ee www.tomshardware.com China’s push for chip independence continues with its first RISC-V server CPUChina is doubling down on the RISC-V architecture.
cross-posted from: https://lemmy.zip/post/35528933
China is doubling down on the RISC-V architecture.
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RISC-V @lemmy.ml Jure Repinc @lemmy.ml cross-posted from: https://lemmy.ml/post/28025426
The European Chips Act has set ambitious goals and its implementation is a significant pan-european effort. From an academic perspective, last year we published an open letter emphasizing the critical importance of open-source EDA for academia in Europe. We were excited and grateful to see that this initiative triggered the definition of a European roadmap in this area, and a matching Chips JU call for project funding. We believe that the projects funded by this call will have a significant impact. Moreover, we already see rising interest from many EU stakeholders, with increasing investments into open-source chip design, especially in open source IP development (e.g. RISC-V cores), and open source EDA tools.
One additional critical barrier remains toward the end-goal of building real open-source chips, especially for prototyping and education: namely, streamlining the access to open source chip production facilities (foundries
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RISC-V @lemmy.ml Alphane Moon @lemmy.world www.theregister.com Europe bets on RISC-V for homegrown supercomputing platform: €240M found for three-year sprint to develop three chiplets for HPC, AI
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RISC-V @lemmy.ml groche @lemmy.rochegmr.com new orange pi with risc-v
The CPU seems similar to the spacemit k1, but apparently there is no information about it. Too cheapt for rvv extensions?
In Europe 8GB version for less than 60€
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RISC-V @lemmy.ml Alphane Moon @lemmy.world www.theregister.com Alibaba launches server-grade RISC-V CPU designA major policy directive strongly suggesting use of the royalty-free architecture is apparently imminent
cross-posted from: https://lemmy.world/post/26398664
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RISC-V @lemmy.ml schizoidman @lemm.ee China Reportedly Set to Roll Out Nationwide RISC-V Chip Push, with Policy Expected by March | TrendForce News
www.trendforce.com [News] China Reportedly Set to Roll Out Nationwide RISC-V Chip Push, with Policy Expected by March | TrendForce NewsWith building self-reliance for the chip industry becoming one of its top priorities, China plans to promote open-source RISC-V chips nationwide for t...
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RISC-V @lemmy.ml Wxnzxn @lemmy.ml peertube.wtf RISC-V and Open Hardware | Fedora Podcast 47We are excited to welcome Isaac Chute, an experienced software engineer with a background in embedded systems and a passion for open-source hardware. We'll delve into the world of RISC-V, an open-s...